Schematic Design and Spice Synthesis of the Arithmetical Operation

Authors

  • S. Omkumar Associate Professor, Department of Electronics and Communication Engineering, SCSVMV (Deemed University), Kanchipuram, Tamilnadu, India
  • Suman Mishra Professor and Head of the Department, Electronics and Communication Engineering, CMR Engineering College, Hyderabad, India

Abstract

In this work, the analysis of hybrid full adder circuit is designed by using Complementary Metal-oxide semiconductor (CMOS) devices. The adder is one of the most required arithmetical functions of the various digital circuits. Full adder is used to perform the three-bit additions of the given inputs. There are various CMOS logic styles are used to build the full adder circuit. In this work, the hybrid full adder is designed by using the transmission gate logic by using CMOS devices. Voltage scaling and reduced transistor size are features of the conventional CMOS architecture. Complementary pass transistor logic (CPL) is another type of logic used to build an adder. The CPL design isn't appropriate for low-power applications. The proposed circuit is implemented by using S- edit in Tanner EDA. The proposed circuit performances are evaluated by using T-spice in Tanner EDA. The proposed full adder is efficiently used for the Arithmetic and logic unit (ALU).

Downloads

Download data is not yet available.

References

. Akhilesh Tyagi, “A Reduced Area Scheme for Carry- Select Adders”, IEEE transaction on computer, Vol. 42, Pp. 1163 – 1170, 1993.

. Bedrij.O.J, “Carry Select Adder”, IRE Transaction Electronics Computer, Vol.11, Pp. 340- 344, 1962.

. Chang. T.Y and Hsiao.M. J, “Carry Select Adder using Single Ripple Carry Adder”, Electronics Letters, Vol. 34, Pp. 2101 – 2103, 1998.

. ChynWey .I, Cheng Chen, Yi. Sheng Lin and Chin Chang pengl, “An Area- Efficient CSLA Design by Sharing the Common Boolean Logic Term”, International Multi conference of Engineers and Computer Scientists, Vol.2 , Pp. 14 -16, 2012.

. He .Y, Chang C.H and Gu.J, “An Area Efficient 64-bit Square Root Carry Select Adder for Low power Application”, IEEE International Symposium Circuits Systems, Vol.4, Pp. 4082 – 4085, 2005.

. Natarajan, P.B., Ghosh, S.K. and Karthik, R., 2017, April. Low power high performance carry select adder. In 2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) (Vol. 2, pp. 601-603). IEEE.

. Shah, S. and Rajula, S., 2019. Design of FIR filter architecture for fixed and reconfigurable applications using highly efficient carry select adder. In Soft Computing and Signal Processing (pp. 627-637). Springer, Singapore.

. Sumalatha, M., Naganjaneyulu, P.V. and Prasad, K.S., 2018. Low-Power and Area-Efficient FIR Filter Implementation Using CSLA with BEC. In Microelectronics, Electromagnetics and Telecommunications (pp. 137-142). Springer, Singapore.

. Rambabu, D., Swetha, T., Ramyamani, V. and Ramya, P., Area-Delay-Power Efficient Carry-Select Adder.

. Shailushree, L. and Krishna, V.R., 2015. Efficient Optimization of Carry Select Adder. International Journal, 25.

. PRIYADARSHINI, K.R. and REDDY, V.N., 2018. Implementation of Area Efficient Carry-Select Adder.

. Rekha, G., Vasanti, M.S., Swetha, M.A. and Kedarnath, B., 2015. Area-Delay-Power Efficient Carry Select Adder. Simulation.

. UJWALA, A. and SANDHYA, M., Implementation Of Area-Delay-Power Efficient Carry Select Adder Using Cadence Tool.

. Maheshwaran, K., 2016. CMOS Design of Low Power High Speed Hybrid Full Adder. International Journal of MC Square Scientific Research, 8(1), pp.16-22.

. Bhargav, K.N.S.P., 2017. Modified Positive Feedback Adiabatic Logic for Ultra Low Power Adder in 90nm. Indian Journal of Public Health Research & Development, 8(4).

Downloads

Published

2021-12-22

Issue

Vol. 13 No. 4 (2021)

Section

Articles

License

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

Authors need to sign following agreement with International Journal of MC Square Scientific Research before publishing their articles:

  • Authors need to return copyright form to Journal Editor-in-chief to proceed their articles for publication. Meantime, the journal licensed under a Creative Commons Attribution License, which permits other user to distribute the work with an acknowledgement of the authors for International Journal of MC Square Scientific Research.
  •  Authors are also able to share their separate, additional contractual arrangements for the non-restricted contribution of the journal with an acknowledgement of publication in International Journal of MC Square Scientific Research.
  • Authors are allowed and encouraged to share their work during the submission process for increasing citation and exploring to increase the paper availability in worldwide way. The Effect of Open Access.